<rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Hacker News: fayalalebrun</title><link>https://news.ycombinator.com/user?id=fayalalebrun</link><description>Hacker News RSS</description><docs>https://hnrss.org/</docs><generator>hnrss v2.1.1</generator><lastBuildDate>Fri, 19 Jun 2026 11:11:29 +0000</lastBuildDate><atom:link href="https://hnrss.org/user?id=fayalalebrun" rel="self" type="application/rss+xml"></atom:link><item><title><![CDATA[The Agent-Native Editor Was Invented in 1976]]></title><description><![CDATA[
<p>Article URL: <a href="https://noquiche.fyi/emacs-for-agents">https://noquiche.fyi/emacs-for-agents</a></p>
<p>Comments URL: <a href="https://news.ycombinator.com/item?id=47597067">https://news.ycombinator.com/item?id=47597067</a></p>
<p>Points: 2</p>
<p># Comments: 1</p>
]]></description><pubDate>Wed, 01 Apr 2026 05:12:10 +0000</pubDate><link>https://noquiche.fyi/emacs-for-agents</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=47597067</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=47597067</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Building an FPGA 3dfx Voodoo with Modern RTL Tools"]]></title><description><![CDATA[
<p>Apparently Voodoo cards defaulted to 1.3 gamma instead of the standard 2.2. I wonder why that is, since it theory using a non-standard gamma would just reduce your color range with no real benefit.<p>This is definitely fixable in the design though by looking at the DAC gamma register. I'll do so once I get to the scan-out implementation on the DE-10 Nano.</p>
]]></description><pubDate>Mon, 23 Mar 2026 05:23:15 +0000</pubDate><link>https://news.ycombinator.com/item?id=47485758</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=47485758</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=47485758</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Building an FPGA 3dfx Voodoo with Modern RTL Tools"]]></title><description><![CDATA[
<p>This fits and runs in a DE-10 Nano without too much difficulty, uses around 70% of the fabric. I've been working on timing closure and just got it to 50 MHz.<p>Note that I also implemented cache components not present in the original Voodoo in order to be more flexible in terms of the memory that can be used. So it could be quite a bit smaller, maybe 50% of the fabric if you got rid of that.</p>
]]></description><pubDate>Mon, 23 Mar 2026 05:12:27 +0000</pubDate><link>https://news.ycombinator.com/item?id=47485702</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=47485702</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=47485702</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Building an FPGA 3dfx Voodoo with Modern RTL Tools"]]></title><description><![CDATA[
<p>You do have a nice point here. Then the compute unit can simply stall the commands coming out of the register bank. Without this I need to stall the write FIFO, which feels less elegant and has given me some pain in terms of combinational loops. The drawback though is that you have to duplicate a significant amount of registers in the compute unit.</p>
]]></description><pubDate>Sun, 22 Mar 2026 16:35:06 +0000</pubDate><link>https://news.ycombinator.com/item?id=47479258</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=47479258</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=47479258</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Building an FPGA 3dfx Voodoo with Modern RTL Tools"]]></title><description><![CDATA[
<p>Thank you! These things do pack in a ridiculous amount of functionality for what they do. Probably why they look so good but also why it took 30 years for a hardware re-implementation.</p>
]]></description><pubDate>Sun, 22 Mar 2026 16:05:36 +0000</pubDate><link>https://news.ycombinator.com/item?id=47478920</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=47478920</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=47478920</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Building an FPGA 3dfx Voodoo with Modern RTL Tools"]]></title><description><![CDATA[
<p>Maybe I'm misunderstanding, but that functionality is implemented in another component. The register bank only records the category of each register and implements the memory-mapped register functionality.<p>This list of registers and their categories are then imported in separate components which sit between incoming writes and the register bank. The advantage is that everything which describes the properties of the registers is in a single file. You don't have to look in three different places to find out how a register behaves.</p>
]]></description><pubDate>Sun, 22 Mar 2026 16:02:29 +0000</pubDate><link>https://news.ycombinator.com/item?id=47478895</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=47478895</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=47478895</guid></item><item><title><![CDATA[Building an FPGA 3dfx Voodoo with Modern RTL Tools]]></title><description><![CDATA[
<p>Article URL: <a href="https://noquiche.fyi/voodoo">https://noquiche.fyi/voodoo</a></p>
<p>Comments URL: <a href="https://news.ycombinator.com/item?id=47477284">https://news.ycombinator.com/item?id=47477284</a></p>
<p>Points: 225</p>
<p># Comments: 54</p>
]]></description><pubDate>Sun, 22 Mar 2026 13:24:38 +0000</pubDate><link>https://noquiche.fyi/voodoo</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=47477284</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=47477284</guid></item><item><title><![CDATA[Show HN: Latchup – Competitive programming for hardware description languages]]></title><description><![CDATA[
<p>Article URL: <a href="https://www.latchup.app/">https://www.latchup.app/</a></p>
<p>Comments URL: <a href="https://news.ycombinator.com/item?id=47319562">https://news.ycombinator.com/item?id=47319562</a></p>
<p>Points: 2</p>
<p># Comments: 0</p>
]]></description><pubDate>Tue, 10 Mar 2026 06:06:48 +0000</pubDate><link>https://www.latchup.app/</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=47319562</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=47319562</guid></item><item><title><![CDATA[New comment by fayalalebrun in "A FPGA friendly 32 bit RISC-V CPU implementation"]]></title><description><![CDATA[
<p>SpinalHDL did not fork from Chisel. You might be able to say that it was inspired by Chisel, but it does not share a commit history. See this comment by the author: <a href="https://www.reddit.com/r/chisel/comments/4ivevd/comment/d3ljh5s/?utm_source=share&utm_medium=web3x&utm_name=web3xcss&utm_term=1&utm_content=share_button" rel="nofollow">https://www.reddit.com/r/chisel/comments/4ivevd/comment/d3lj...</a></p>
]]></description><pubDate>Sun, 26 Jan 2025 02:37:53 +0000</pubDate><link>https://news.ycombinator.com/item?id=42827206</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=42827206</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=42827206</guid></item><item><title><![CDATA[New comment by fayalalebrun in "“Bad Apple” in Minecraft"]]></title><description><![CDATA[
<p>My favorite dithering algorithm for motion video is Yliluoma dithering: <a href="https://bisqwit.iki.fi/story/howto/dither/jy/" rel="nofollow">https://bisqwit.iki.fi/story/howto/dither/jy/</a><p>It is especially useful for grayscale content, as finding the optimal dithering matrix from the available palette is a straightforward exact operation, and the result can be placed in a LUT for real-time rendering.<p>In my opinion it looks much better than bayer or random dithering, especially on gradients.</p>
]]></description><pubDate>Sat, 12 Oct 2024 18:47:31 +0000</pubDate><link>https://news.ycombinator.com/item?id=41821411</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=41821411</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=41821411</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Ask HN: What business would you start in 2025?"]]></title><description><![CDATA[
<p>Do you have any other examples where systolic arrays are suitable other than matrix multiplication? As far as I am aware, other problems require different systolic architectures. So I am curious whether you are talking about a general purpose architecture.</p>
]]></description><pubDate>Sun, 21 Jul 2024 12:08:22 +0000</pubDate><link>https://news.ycombinator.com/item?id=41024510</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=41024510</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=41024510</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Google Chrome has an API accesible only from *.google.com"]]></title><description><![CDATA[
<p>As a result of a flaw in the protocol itself or in its implementation?</p>
]]></description><pubDate>Tue, 09 Jul 2024 19:21:46 +0000</pubDate><link>https://news.ycombinator.com/item?id=40919874</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=40919874</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=40919874</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Why the CORDIC algorithm lives rent-free in my head"]]></title><description><![CDATA[
<p>This is a common misconception, but is not the case. For example, look at the Voodoo 1, 2, and 3, which also used fixed point numbers internally but did not suffer from this problem.<p>The real issue is that the PS1 has no subpixel precision. In other words, it will round a triangle coordinates to the nearest integers.<p>Likely the reason why they did this is because then you can completely avoid any division and multiplication hardware, with integer start and end coordinates line rasterization can be done completely with addition and comparisons.</p>
]]></description><pubDate>Sun, 12 May 2024 05:27:59 +0000</pubDate><link>https://news.ycombinator.com/item?id=40332429</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=40332429</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=40332429</guid></item><item><title><![CDATA[Chasing resets]]></title><description><![CDATA[
<p>Article URL: <a href="https://zipcpu.com/blog/2024/04/01/chasing-resets.html">https://zipcpu.com/blog/2024/04/01/chasing-resets.html</a></p>
<p>Comments URL: <a href="https://news.ycombinator.com/item?id=39976472">https://news.ycombinator.com/item?id=39976472</a></p>
<p>Points: 35</p>
<p># Comments: 2</p>
]]></description><pubDate>Tue, 09 Apr 2024 05:47:03 +0000</pubDate><link>https://zipcpu.com/blog/2024/04/01/chasing-resets.html</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=39976472</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39976472</guid></item><item><title><![CDATA[New comment by fayalalebrun in "A rudimentary simulation of the three-body problem"]]></title><description><![CDATA[
<p>A few years ago a friend and I made something similar to universe sandbox, though only with the gravitational simulation part: <a href="https://github.com/fayalalebrun/Astraria">https://github.com/fayalalebrun/Astraria</a><p>Surprisingly enough the jar still runs without issue. Something which probably would not be the case for linux binaries, but maybe for windows.</p>
]]></description><pubDate>Wed, 03 Apr 2024 07:28:24 +0000</pubDate><link>https://news.ycombinator.com/item?id=39914543</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=39914543</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39914543</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Red Hat to author new Linux driver for Nvidia GPUs in Rust"]]></title><description><![CDATA[
<p>Even though the newest nvidia drivers have started to support GBM, the Wayland compatibility story is still not great. In my experience on Wayland, several OpenGL programs refuse to work, and Vulkan does not work at all. This is with driver 545.</p>
]]></description><pubDate>Thu, 21 Mar 2024 06:35:04 +0000</pubDate><link>https://news.ycombinator.com/item?id=39775446</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=39775446</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39775446</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Veryl: A Modern Hardware Description Language"]]></title><description><![CDATA[
<p>I probably don't have nearly as much experience as you do, but I have used VHDL, Verilog, and modern HDLs like Chisel and SpinalHDL. I think the main advantage of a modern HDL is to have the full power of a traditional programming language when it comes to generating hardware. This especially helps when making deeply parameterizable and reusable hardware in a fraction of the lines compared to SystemVerilog, and which sometimes is impossible to do in Verilog.<p>From a first impression, your language doesn't look all that different from SystemVerilog. Does it have any features that make parameterization easier than SystemVerilog? Can I, for example, easily generate hardware using higher order functions and other functional programming features like those available in Rust and Scala?</p>
]]></description><pubDate>Thu, 14 Mar 2024 06:45:36 +0000</pubDate><link>https://news.ycombinator.com/item?id=39701145</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=39701145</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39701145</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Veryl: A Modern Hardware Description Language"]]></title><description><![CDATA[
<p>Chisel does emit FIRRTL. Which can be made into a bitstream directly by Yosys.</p>
]]></description><pubDate>Thu, 14 Mar 2024 06:09:44 +0000</pubDate><link>https://news.ycombinator.com/item?id=39700988</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=39700988</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39700988</guid></item><item><title><![CDATA[New comment by fayalalebrun in "Conformant OpenGL 4.6 on the M1"]]></title><description><![CDATA[
<p>Perhaps already possible via MoltenVK -> Vulkan -> Zink?</p>
]]></description><pubDate>Wed, 14 Feb 2024 18:01:31 +0000</pubDate><link>https://news.ycombinator.com/item?id=39372951</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=39372951</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39372951</guid></item><item><title><![CDATA[New comment by fayalalebrun in "OpenFPGA"]]></title><description><![CDATA[
<p>I am surprised no one has yet tried to make a portable shell for the DE-10 Nano (Mister-FPGA's target platform). With a power usage of 10 watts, I think it should be quite feasible even with the addition of a small LCD panel. However, it would probably require re-engineering some of the standard addon boards for the form factor.</p>
]]></description><pubDate>Mon, 12 Feb 2024 13:18:43 +0000</pubDate><link>https://news.ycombinator.com/item?id=39344421</link><dc:creator>fayalalebrun</dc:creator><comments>https://news.ycombinator.com/item?id=39344421</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39344421</guid></item></channel></rss>