Hacker News: janwas

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Mon, 25 May 2026 14:26:03 +0000

Oops, the final T got cut off somehow, sorry about that.

https://gcc.godbolt.org/z/KM3ben7ET

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Wed, 20 May 2026 09:16:20 +0000

Any suggestions for improvement? We went through >5 iterations of the dispatching and I am fairly confident this is about as good as it gets in current C++. I suppose "macro hell" is a matter of taste. Objectively, we have six dispatch related macros in the example: https://gcc.godbolt.org/z/KM3ben7E The ~two dozen lines of boilerplate are generally copied from an example. But why multi-file?

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Mon, 18 May 2026 12:45:09 +0000

Working on one together with fastcode.org :)

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Mon, 18 May 2026 07:58:36 +0000

To be clear, "better abstractions" here seems to mean macros for assembly language. To each their own.

What bothers me is advocating for this, or denigrating more generally useful alternatives, without mentioning the very narrow niche where this sits.

Video codecs only change every few years. This makes it more worthwhile/feasible to spend eng time on a few kernels.

Even then, not supporting SVE (you don't, right?) gives less incentive for the Arm CPU ecosystem to invest in it, helping keeping us stuck in the NEON local minimum. Not ideal :/

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Mon, 18 May 2026 06:24:35 +0000

Correction (typo): Z13 lacks fp32.

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Mon, 18 May 2026 06:23:37 +0000

Oh, interesting :) I meant Fastcode.org.

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Sun, 17 May 2026 16:37:32 +0000

Is this a good faith reply? The particular abstraction we built, and is being discussed, is manifestly and obviously not a lowest common denominator. Looks like you are deploying a second straw man, that of zero cost. In other comments here I acknowledge a cost to intrinsics.

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Sun, 17 May 2026 16:13:36 +0000

?? Where did you see mention of AI?

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Sun, 17 May 2026 16:12:37 +0000

Thanks for sharing. The first link seems non public indeed. I can imagine there is some compile issue we could reasonably fix, with the help of someone who has Z13 access. Please encourage them to raise an issue. I will be back on May 26. After that, it should at least be able to use the scalar fallback. The issue with Z14 is that it lacks fp32 support. Would their usage be integer only?

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Sun, 17 May 2026 16:06:55 +0000

Fair point. If it helps, our security team has called Highway critical infrastructure and helped to harden the repo. The flip side of standardization is that it would be much harder and slower to add ops as the need arises, which we do regularly.

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Sun, 17 May 2026 16:02:48 +0000

:) I figure there is always something left to improve. For some kernels which really want to keep 30+ live registers, the compiler might not do as good a job as careful manual tuning, so intrinsics can have a bit of a cost. But I also figure optimization time is limited, so better to get 90% of several kernels rather than one to 99%.

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Sun, 17 May 2026 10:48:39 +0000

Yes, the EMU128 target is scalar only, with for loops. This is a fun way to see how well autovectorization works, with the same source code. That works on any CPU. Curious which projects have such concerns, any link?

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Sun, 17 May 2026 09:50:42 +0000

In such discussions, whenever you mention abstractions are universally "pretty poor", to the extent anyone is listening, I think this hyperbole can do real damage. Maybe it prevents people from getting relevant performance gains, even if not 100% of the optimum, which is anyway unattainable. And what is the alternative? Not many projects can afford to hand write intrinsics for all platforms. And are you aware that Highway is basically a thin wrapper over intrinsics, which you can still drop down to where it helps?

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Sun, 17 May 2026 09:39:22 +0000

This works today :) Highway provides such an abstraction for arbitrary vector lengths and maps them to intrinsics. All on the library level, no need to wait years for compiler or language updates.

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Sun, 17 May 2026 09:30:12 +0000

:) I agree a tutorial would be helpful. We are working on one with Fastcode.

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Sun, 17 May 2026 09:21:25 +0000

Have you considered our Highway library? Runtime dispatch need not be a PITA :) It's basically portable intrinsics, and a much more complete set (>300) than the ~50 in std.

New comment by janwas in "C++26 Shipped a SIMD Library Nobody Asked For"

janwas — Mon, 23 Mar 2026 06:46:02 +0000

Highway TL here. I agree with the main points, with a few clarifications:

> tag-dispatched free functions like hn::Mul(d, a, b)

We only require tags for certain ops, mainly memory, casts and reduction; not arithmetic. Operator overloading is supported but until recently compilers didn't allow that for SVE vectors.

> It’s a Google project with Google-scale maintenance, but the bus factor is real — the core development is driven by a small team

We have 101 contributors, including 14 current or former Googlers in several teams.

> being length-agnostic means you can’t easily express fixed-width algorithms that depend on knowing the vector size at compile time, which is common in cryptography and codec work

We explicitly support fixed-length 128-bit vectors, acknowledging that these are common and important.

New comment by janwas in "RISC-V Is Sloooow"

janwas — Sat, 14 Mar 2026 08:34:47 +0000

Looks like the ratification plan for Zvzip is November. So maybe 3y until HW is actually usable? That's a neat trick with wmacc, congrats. But still, half the speed for quite a fundamental operation that has been heavily used in other ISAs for 20+ years :(

Great that you did a gap analysis [1]. I'm curious if one of the inputs for that was the list of Highway ops [2]?

[1]: https://gist.github.com/camel-cdr/99a41367d6529f390d25e36ca3... [2]: https://github.com/google/highway/blob/master/g3doc/quick_re...

New comment by janwas in "RISC-V Is Sloooow"

janwas — Fri, 13 Mar 2026 19:54:18 +0000

(Personal opinion) I get the impression that RISC-V-related discussions often lack of awareness of prior work/alternatives. A large amount of (x86) software actually uses our Highway library to run on whatever size vectors and instructions the CPU offers.

This works quite well in practice. As to leaving performance on the table, it seems RVV has some egregious performance differences/cliffs. For example, should we use vrgather (with what LMUL), or interesting workarounds such as widening+slide1, to implement a basic operation such as interleaving two vectors?

New comment by janwas in "I have written gemma3 inference in pure C"

janwas — Wed, 28 Jan 2026 20:28:36 +0000

:D Your code was nicely written and it was a pleasure to port to SIMD because it was already very data-parallel.