<rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Hacker News: napowderly</title><link>https://news.ycombinator.com/user?id=napowderly</link><description>Hacker News RSS</description><docs>https://hnrss.org/</docs><generator>hnrss v2.1.1</generator><lastBuildDate>Sat, 05 Sep 2026 06:14:29 +0000</lastBuildDate><atom:link href="https://hnrss.org/user?id=napowderly" rel="self" type="application/rss+xml"></atom:link><item><title><![CDATA[New comment by napowderly in "Can AI design circuit boards yet?"]]></title><description><![CDATA[
<p>I think the amount of reuse is a big difference. IC tools build on characterized cells with a lot of the rules already encoded. With PCBs, even when you're reusing a reference circuit, you're often manually carrying over the constraints and figuring out which layout decisions mattered. A lot of the engineering gets repeated rather than traveling with the design. That's something we're trying to improve with atopile.</p>
]]></description><pubDate>Fri, 04 Sep 2026 21:18:20 +0000</pubDate><link>https://news.ycombinator.com/item?id=49570348</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=49570348</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=49570348</guid></item><item><title><![CDATA[Show HN: EEBench – AI agents design real circuits, graded by physics simulation]]></title><description><![CDATA[
<p>Hi HN — we build atopile, an open-source language and compiler for designing circuit boards in code. People kept asking us "can AI just design the board?" — so we measured it.<p>EEBench is a set of original EE tasks: design-from-spec, datasheet comprehension, design review, picking real parts that actually exist. Agents submit design source, not prose. The grader runs compiler checks and simulations, and scores measured behavior — transients, thresholds, tolerance corners — against the spec. No human graders, no LLM-as-judge. When a score says the rail sagged below 3.0 V during brown-out, that's a waveform, not an opinion.<p>Things that surprised us:<p>The frontier cluster spans roughly 45–72% (Claude Fable 5 on top at 71.7%).
Open-weight models that do well on coding benchmarks score 5–13% here.
Cost per task varies 15x between models with similar scores.
Honest limitations: the task set is curated from a larger pack to separate the frontier models, and it's growing. The pack is held out to keep it out of training data, so you can't self-run it yet. If you want a model on the board, email us and we'll run it.<p>Happy to go deep on the grading harness — ask us anything.</p>
<hr>
<p>Comments URL: <a href="https://news.ycombinator.com/item?id=48766320">https://news.ycombinator.com/item?id=48766320</a></p>
<p>Points: 1</p>
<p># Comments: 0</p>
]]></description><pubDate>Thu, 02 Jul 2026 19:37:25 +0000</pubDate><link>https://www.eebench.org/</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=48766320</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=48766320</guid></item><item><title><![CDATA[Show HN: Turn your PCB into a Minecraft world]]></title><description><![CDATA[
<p>Article URL: <a href="https://www.youtube.com/watch?v=3z7CzlbqfR0">https://www.youtube.com/watch?v=3z7CzlbqfR0</a></p>
<p>Comments URL: <a href="https://news.ycombinator.com/item?id=47828246">https://news.ycombinator.com/item?id=47828246</a></p>
<p>Points: 2</p>
<p># Comments: 0</p>
]]></description><pubDate>Sun, 19 Apr 2026 22:33:15 +0000</pubDate><link>https://www.youtube.com/watch?v=3z7CzlbqfR0</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=47828246</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=47828246</guid></item><item><title><![CDATA[NONOS: Open-source, privacy-first Sonos alternative that actually sounds good]]></title><description><![CDATA[
<p>Article URL: <a href="https://github.com/atopile/nonos">https://github.com/atopile/nonos</a></p>
<p>Comments URL: <a href="https://news.ycombinator.com/item?id=44639802">https://news.ycombinator.com/item?id=44639802</a></p>
<p>Points: 24</p>
<p># Comments: 3</p>
]]></description><pubDate>Mon, 21 Jul 2025 20:01:36 +0000</pubDate><link>https://github.com/atopile/nonos</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=44639802</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=44639802</guid></item><item><title><![CDATA[New comment by napowderly in "Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>Above links broken:
<a href="https://github.com/atopile/packages/blob/main/packages/ti-ina228/ti-ina228.ato">https://github.com/atopile/packages/blob/main/packages/ti-in...</a>
<a href="https://github.com/atopile/packages/blob/main/packages/ti-ina228/ti_addressor2.py">https://github.com/atopile/packages/blob/main/packages/ti-in...</a></p>
]]></description><pubDate>Thu, 17 Jul 2025 23:56:44 +0000</pubDate><link>https://news.ycombinator.com/item?id=44599678</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=44599678</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=44599678</guid></item><item><title><![CDATA[New comment by napowderly in "Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>I basically dont write ato code when designing modules any more, claude code + rules file + a few decent examples and an MCP for basic functions like building, finding parts and inspecting library components is able to do a pretty great job. As an example, claude one-shotted this MPU6050 design: <a href="https://github.com/atopile/packages/blob/multi/adafruit_heist_2/packages/invensense-mpu6050/invensense-mpu6050.ato">https://github.com/atopile/packages/blob/multi/adafruit_heis...</a><p>Currently working on a pipeline to generate a whole bunch of these automatically, stick them on some big test boards and make sure they actually work. We will be selling razor blades, and will have the test data to show they work.</p>
]]></description><pubDate>Thu, 17 Jul 2025 00:29:32 +0000</pubDate><link>https://news.ycombinator.com/item?id=44588400</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=44588400</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=44588400</guid></item><item><title><![CDATA[New comment by napowderly in "Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>I think there is actually some really neat stuff to be built here. I think layout engineers would love to be able to write down their 'style guide' that is basically a set of parameters modifying the footprint. We would have a 'common' representation, basically a definition of the package itself that would be transformed to whatever you might like for the pad/silk shapes. Something very similar to having a linter in code that would enforce company best practices.<p>We already provide the 'plug and play' version which looks quite alot like LCSC data and is certainly good enough for playing around with. Id really like to put some effort into standardizing this in the mid-term, seems pretty crazy to me that there are way more footprints designs out there than actual packages.</p>
]]></description><pubDate>Thu, 17 Jul 2025 00:20:52 +0000</pubDate><link>https://news.ycombinator.com/item?id=44588348</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=44588348</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=44588348</guid></item><item><title><![CDATA[New comment by napowderly in "Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>Our vision is not schematic capture, but intent capture. Once you can capture intent it can trickle down to schematics, layout, BOM selection etc. The language is pretty simple at the moment and building out from the 'minimum useful product' which is basically replacing the schematic.<p>The schematic is not most of the work, but it is the place that most of the work is relying on as a source of truth. Everything from firmware header files, end of line testing, reliability tests to service manuals. Today as an engineer you end up in the middle of that. Once you have a complete description, much of the boiler plate work can be automated.<p>We have done quite alot on the components and routing section of the work as well, we can generate most components for you automatically without leaving the IDE and have a growing list of fully auto-selected components. Instead of going to digkey to find a 10kohm 1% 0402, you can just give those specs to our tool and it will automatically pick the most suitable one for you, considering things like price and stock (plus eventually any other filtering you might care about, including custom libraries). For layout we currently just to layout reuse blocks, which is actually a crazy time saver for how simple it is. <a href="https://packages.atopile.io/">https://packages.atopile.io/</a> currently has ~10s of parts, but we are growing it over the next few weeks to ~thousands, so most parts you want to use will have a reference design + layout you can install and use in your project, just like you would NPM/pypi.</p>
]]></description><pubDate>Thu, 17 Jul 2025 00:08:45 +0000</pubDate><link>https://news.ycombinator.com/item?id=44588275</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=44588275</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=44588275</guid></item><item><title><![CDATA[New comment by napowderly in "Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>We think both are pretty important. For most people, the ato language should be sufficiently powerful, for module designers we have a python interface that allows for more complex designs.<p>For example the INA228 from TI has a funky addressing scheme that is not possible to describe in ato, so we create a hybrid module:<p>atopile for the main structure:
<a href="https://github.com/atopile/packages/blob/multi/adafruit_heist_2/packages/ti-ina228/ti-ina228.ato">https://github.com/atopile/packages/blob/multi/adafruit_heis...</a><p>compose in an 'addressor' python module:
<a href="https://github.com/atopile/packages/blob/multi/adafruit_heist_2/packages/ti-ina228/ti_addressor2.py">https://github.com/atopile/packages/blob/multi/adafruit_heis...</a></p>
]]></description><pubDate>Wed, 16 Jul 2025 23:40:38 +0000</pubDate><link>https://news.ycombinator.com/item?id=44588059</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=44588059</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=44588059</guid></item><item><title><![CDATA[New comment by napowderly in "Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>Fair enough! We definitely need a better landing page, we are just coming out of a long period of building, will all be getting some much needed polish soon!<p>Here is one of our more recent demo projects you can check out that shows how a larger project is structured:
<a href="https://github.com/atopile/nonos/blob/main/elec/src/nonos.ato">https://github.com/atopile/nonos/blob/main/elec/src/nonos.at...</a><p>And an example of modeling a component:
<a href="https://github.com/atopile/packages/tree/main/packages/archive/adi-adau145x">https://github.com/atopile/packages/tree/main/packages/archi...</a></p>
]]></description><pubDate>Wed, 16 Jul 2025 23:22:15 +0000</pubDate><link>https://news.ycombinator.com/item?id=44587926</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=44587926</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=44587926</guid></item><item><title><![CDATA[New comment by napowderly in "Show HN: Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>For sure, the way I see the component library is ability to capture progress. In the current paradigm how many times have schematics, symbols and footprints been drawn up for common ICs/circuits? I would expect 100s or in some cases many thousands of times. Our hope is by providing an open source and shareable format we can reduce this. If people really hate code and want to write a tool to convert to altium/kicad/cadence format, go for it! At the same time, I think the way we share component data is pretty dated, PDF datasheets do not adequately capture component information in a way that can be apples to apples compared in any automated fashion, best we have is something like a digikey search. In the future I would like to be able to have much more sophisticated requirements that automated search tools can use to help me find the best components for my use.<p>Not personally a fan of the readability of lisp, but that is just a personal preference. Our assumption is that python is going to be the most familiar language to our users and following a python like syntax will make picking it up easy. Our language is definately still quite immature and we are still figuring out exactly what it should look like.<p>There is definitely a little bit of a learning curve at the moment, we do have some getting started videos that walk you through the whole process. If there is anything missing or confusing, please point it out! We do want to make it as approachable as possible. It will only get better from here, I promise!<p>On the downloading, currently we have the package on pypi, which does make it pretty easy to install from a command line, but I can appreciate that will be new to alot of people. In the future we might do an executable download version.<p>We have a getting started video here: <a href="https://www.youtube.com/watch?v=7aeZLlA_VYA" rel="nofollow">https://www.youtube.com/watch?v=7aeZLlA_VYA</a><p>We are very active on discord also if you get stuck or have any questions/feedback, hope to see you there! <a href="https://discord.gg/PBq4pS4K3p" rel="nofollow">https://discord.gg/PBq4pS4K3p</a></p>
]]></description><pubDate>Wed, 07 Feb 2024 17:16:41 +0000</pubDate><link>https://news.ycombinator.com/item?id=39291195</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=39291195</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39291195</guid></item><item><title><![CDATA[New comment by napowderly in "Show HN: Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>In our tool, just give it a part number and it will find and download the footprint and create an ato file for the component.<p>We currently support components on JLC, but eventually plan to build out a pretty substantial library. We will also capture a good fraction of information that you would currently need to go to the datasheet for.</p>
]]></description><pubDate>Tue, 06 Feb 2024 16:22:52 +0000</pubDate><link>https://news.ycombinator.com/item?id=39276221</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=39276221</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39276221</guid></item><item><title><![CDATA[New comment by napowderly in "Show HN: Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>Indeed! We do support quite a few parameters for component selection today, but definitely want to add a lot more. I think this opens up some exciting possibilities, for example not needing to explicitly call out a part number for generic components in your source code, retaining information about what the requirements of that part are. Of course in production you would want a lock file to make sure things are not changing arbitrarily, but I personally would have loved something like that while I was dealing with chip shortages a few years back.</p>
]]></description><pubDate>Tue, 06 Feb 2024 07:04:29 +0000</pubDate><link>https://news.ycombinator.com/item?id=39271605</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=39271605</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39271605</guid></item><item><title><![CDATA[New comment by napowderly in "Show HN: Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>I am curious to hear that you dont see any value in bringing software workflow to hardware. I found in previous jobs we spent a huge fraction of our time dealing with things like release, version management and reviews. Thanks for your thoughts!</p>
]]></description><pubDate>Tue, 06 Feb 2024 00:59:26 +0000</pubDate><link>https://news.ycombinator.com/item?id=39269416</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=39269416</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39269416</guid></item><item><title><![CDATA[New comment by napowderly in "Show HN: Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>For sure, our goal is to solve the toughest problems in electrical engineering, we are starting with the low hanging fruit. Confident reuse of designs that can be verified and validated before a chip is placed sounds pretty exciting to me!<p>BOM generation and abstraction have definitely not made it to PCBA design yet, so that is where we are starting.<p>Stoked to get to the hard stuff.</p>
]]></description><pubDate>Mon, 05 Feb 2024 23:07:26 +0000</pubDate><link>https://news.ycombinator.com/item?id=39268472</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=39268472</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39268472</guid></item><item><title><![CDATA[New comment by napowderly in "Show HN: Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>For sure, we have been pretty focused on the low level part of the language, I think it will be interesting to see how our language evolves as we are able to abstract away more of the low level connectivity and configuration. I think eventually we will end up building something like a python library on top of ato to get the best of both worlds.</p>
]]></description><pubDate>Mon, 05 Feb 2024 22:20:26 +0000</pubDate><link>https://news.ycombinator.com/item?id=39268047</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=39268047</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39268047</guid></item><item><title><![CDATA[New comment by napowderly in "Show HN: Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>Indeed, we think the community aspect of this is super important. Being able to reuse high quality work confidently is very nice. Our export is pretty cool already! We build outputs in CI on a server, ready to drag and drop directly into JLC, including BOM and PNP files.<p>Being able to use git was our fundamental motivator, we all previously worked a big companies and found it maddening that we couldnt work in parallel on projects without breaking everything.<p>On parts specs, for sure, we currently capture all the data you would see on JLCs website. We do have dielectric and voltage ratings for caps. Eventually we plan to scrape a bunch of datasheets to build out a high quality dataset, I am very excited about this!</p>
]]></description><pubDate>Mon, 05 Feb 2024 22:09:28 +0000</pubDate><link>https://news.ycombinator.com/item?id=39267942</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=39267942</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39267942</guid></item><item><title><![CDATA[New comment by napowderly in "Show HN: Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>Thanks! We definitely want to get involved on the education side. Currently we are super focused on building out the tool and growing a community around it. We are looking for people to use our tool and give feedback on what works and what sucks. Would be excited to chat about what you would want to see from an education standpoint!</p>
]]></description><pubDate>Mon, 05 Feb 2024 22:02:40 +0000</pubDate><link>https://news.ycombinator.com/item?id=39267867</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=39267867</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39267867</guid></item><item><title><![CDATA[New comment by napowderly in "Show HN: Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>Agreed, we need to flip this.</p>
]]></description><pubDate>Mon, 05 Feb 2024 21:47:29 +0000</pubDate><link>https://news.ycombinator.com/item?id=39267698</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=39267698</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39267698</guid></item><item><title><![CDATA[New comment by napowderly in "Show HN: Atopile – Design circuit boards with code"]]></title><description><![CDATA[
<p>We had a look at a few options before doing our own. A few thoughts; 
Building a DSL allows us to keep it really simple to start, we tried using SKIDL ( a very cool python project) and found it was pretty easy to get your self in a weird spot, the language would let users do things like create a component and not hold a reference to it.<p>Units and tolerances are core to our language, the physical world is 'fuzzy' and having a good way to deal with those we think is pretty important.<p>We are also trying to make it as readable and friendly as possible, our expectation is our users will likely have some experience with python and perhaps a little C back in school, so making it clear and approachable is front of mind.<p>Very open to critiques on our choices! We still very much in development.</p>
]]></description><pubDate>Mon, 05 Feb 2024 21:46:42 +0000</pubDate><link>https://news.ycombinator.com/item?id=39267692</link><dc:creator>napowderly</dc:creator><comments>https://news.ycombinator.com/item?id=39267692</comments><guid isPermaLink="false">https://news.ycombinator.com/item?id=39267692</guid></item></channel></rss>