I've worked on some of the current highest profile chip projects doing "frontend" RTL design, and at every major chip company I've worked at, and from talking with coworkers about their past experiences at other companies, the handoff-wall between RTL and PD is leaving a substantial amount of perf per power/area on the table. (like 30% I'm general)

RTL designers generally have no visibility into how their designs are getting laid out, and generally don't want to have to care. PD engineers have no visibility into the uArch and low level code details, and maybe they want to care but everything is too obfuscated in general.

So when your pins are misplaced during an early iteration, RTL will blindly add retiming to resolve timing issues and make PD happy but never check if it's actually needed. PD will slave away trying to make busted RTL work with placement and recipe adjustments rather than asking RTL for a trivial fix, etc etc.

There are a ton of small things where visibility into either side of the process would result in measurably better hardware, but the current team structures and responsibility boundaries encourage people not to care.

Or if not infinitely fast, but we're going to assume a chain could accelerate it indefinitely, than it's still more reasonable to assume each pass happens exactly how fast it needs to for 6s/num_peasants, comes to a halt, and then moves to the next. That way all the peasants have the same, minimum, speed, Instead of some slow, other absurdly fast based on an arbitrarily assumed, linear, acceleration.

(Why not assume exponential acceleration and say after 10 passe s it hits light speed)

If you believed Bitcoin was under valued, you would just buy Bitcoin and not pay a 100% premium to buy shares in their company.

Also being inflationary is a feature of the US dollar, not a downside. It feels like crypto shills never discuss why inflation is intentional and good and rely on the financially illiterate to be shocked by those 93% and 1/5th numbers

> first designed specifically for inference. For more than a decade, TPUs have powered Google’s most demanding AI training and serving workloads...

What do they think serving is? I think this marketing copy was written by someone with no idea what they are talking about, and not reviewed by anyone who did.

Also funny enough it kinda looks like they've scrubbed all their references to v4i, where the i stands for inference. https://gwern.net/doc/ai/scaling/hardware/2021-jouppi.pdf

I would put the market value of a backdoor into all Senior White House communications as certainly >$10B, and probably >$100B, limited only by how long the buyer believed it would be a reliable source of intel. (it may be better to offer it as a subscription service.)

At that point everything should be assumed to be compromised until demonstrated to a reasonable degree of confidence that it's probably safe. A random install from an app store is not that.

A food insecure developing country might be overtly reliant on staple carbs like rice and grains. Easy access to protein sources like meat could also just mean easy access to excess calories, regardless of whether a carb heavy diet would otherwise be more predictive of obesity.

Also, outrageous, conspiracy-oriented, and rage-bait content has much higher engagement anyway, which is why their algorithm has historically encouraged it so heavily. Explicit misinformation falls into those categories and has been good for their bottom line and getting everyone's parents addicted to the platform

Ultimately the only "real" concern was silently perpetuating biases, as long as it isn't silent and the user is made aware of the options, who cares? You'll never be able to baby-proof these things enough to stop "bad actors" from generating whatever they want without compromising the actual usage

Kinda disappointing if it's really just a paint by numbers Photoshop to look nice

I think the average programmer would be horrified if they really knew the state of modern chip design. SWEs already know how bad most software is, but imagine an entire industry of tens of thousands of people writing code (HDL/TCL), who often don't even think what they do is programming, that has evolved over the last 50 years with minimal interaction with the rest of the software engineering world.

Verilog is a nightmare. The tools are buggy. Everyone has Stockholm syndrome. Version control is considered state-of-the-art and you're lucky if your org uses it.

I've seen a lot of HDL code in my career, and there's a huge number of well respected senior engineers who think having any form of hierarchy, abstraction, or even for-loops is very advanced design practice.

The only good part is the bar is so low it's easy to standout and climb. I think the industry is in a position where it would be surprisingly easy for a startup of seasoned SWEs with a decent understanding of how to write optimized hardware to churn out competitive chips with 10x the velocity of the big players like Nvidia/AMD/Intel

Any question at the start of a reply can be answered with, "No, that's obviously not what they said, let's try to keep the drama to a minimum please."