Hacker News: variaga

New comment by variaga in "I won't download your app. The web version is a-ok"

variaga — Mon, 06 Apr 2026 17:23:18 +0000

Companies with poor quality mobile websites also usually have poor quality apps.

The website can be objectively bad, but still better than the app experience.

New comment by variaga in "Systemd BirthDate Merge: Conflicts of Interest"

variaga — Fri, 03 Apr 2026 14:56:57 +0000

>Why doesn’t someone fork systemd

Why don't you? It's open source. No one is stopping you. Your ideas on how init systems should work are obviously superior, so you'll easily win over a majority of developers, right?

New comment by variaga in "Show HN: The King Wen Permutation: [52, 10, 2]"

variaga — Mon, 23 Mar 2026 17:04:05 +0000

I read the page and went through the "verify the cycles for yourself" sequence and I still have no earthly idea when defining the cycles, what is the rule that says "if you're currently on hexagram X, you can calculate the next hexagram Y by doing..."

New comment by variaga in "An FAQ on Reinforcement Learning Environments"

variaga — Sat, 21 Mar 2026 02:18:51 +0000

Unless you say it as "a fak"

New comment by variaga in "A proposal to classify happiness as a psychiatric disorder (1992)"

variaga — Tue, 17 Mar 2026 14:44:07 +0000

"Happiness comes in small doses folks. It's a cigarette butt, or a chocolate chip cookie or a five second orgasm. You come, you smoke the butt you eat the cookie you go to sleep wake up and go back to f---ing work the next morning, THAT'S IT! End of f---ing list!"

-Dennis Leary

New comment by variaga in "Debian's Challenge When Its Developers Drift Away"

variaga — Thu, 05 Feb 2026 02:12:16 +0000

I am a native English speaker, and it's not just you.

New comment by variaga in "Data centers in space makes no sense"

variaga — Wed, 04 Feb 2026 01:56:52 +0000

This is the correct analysis.

Not to go all Ian Malcolm, but half this comment section is spending so much time wondering if we could build a space data center, without stopping to ask if it made any goddamn sense whatsoever to do so.

New comment by variaga in "Data centers in space makes no sense"

variaga — Wed, 04 Feb 2026 01:49:47 +0000

Heat travels when there is a thermal gradient. What thermally superconducting material are you going to make your cube out of that the surface temperature is exactly the same as the core temperature? If you don't have one, then to keep the h100 at 70c, the radiators have to be colder. How much more radiator area do you need then?

Have you considered the effects of insolation? Sunlight heats things too.

How efficient is your power supply and how much waste heat is generated delivering 1kW you your h100?

How do you move data between the ground and your satellite? How much power does that take?

If it's in LEO, how many thermal cycles can your h100 survive? If it's not in LEO, go back to the previous question and add an order of magnitude.

I could go on, but honestly those details - while individually solvable - don't matter because there is no world where you would not be better off taking the exact same h100 and installing it somewhere on the ground instead

New comment by variaga in "TSMC Risk"

variaga — Mon, 26 Jan 2026 20:23:23 +0000

"Just shift back" is really underestimating how much effort it takes to port a design to a different foundry. Sure, you can target a new stdcell library and recompile your RTL (and re-floorplan, and re-do a bunch of other stuff) but you also have to swap out all your memories and interfaces, not all of which may have exact equivalents... it can easily take 1+ years of work for a competent team, and if you have to shift back all that time and effort was wasted.

New comment by variaga in "TSMC Risk"

variaga — Mon, 26 Jan 2026 16:28:09 +0000

Some of us are old enough to remember the last time Intel was definitely, 100%, for-sure committed to offering foundry services, and then changed their mind and canceled the whole thing (it was in 2018) and want to see (a) someone else have success with 18A first and (b) intel show an actual long-term commitment to using their foundry for outside customers before we risk our companies' future on them.

There are risks with TSMC, but "TSMC just decides it's not interested in making chips for other people, and cancels the whole business" isn't one of them. The same cannot be said for Intel.

New comment by variaga in "Notes on the Intel 8086 processor's arithmetic-logic unit"

variaga — Sat, 24 Jan 2026 00:17:50 +0000

Big-endian matches the way we commonly write numbers, but if you have to deal with multiple word widths or greater than word-width math I find little-endian much more straightforward because LE has the invariant that bit value = 2^bit_index and byte value = 2^(8byte_index).

E.g. a 1 in bit 7 on a LE system always represnts 2^7 for 8/16/32/64/ whatever bit word widths.

This is emphatically not true in BE systems and as evidence I offer that IBM (natively BE), MIPS natively BE) and ARM (natively LE but with a BE mode) all have different mappings of bit and byte indices/lanes in larger word widths* while all LE systems assign the bit/byte lanes the same way.

Using the bit 7 example

- IBM 8-bit: bit 7 is in byte 0 and equal to 2^0

- IBM 16-bit: bit 7 is in byte o and equal to 2^8

- IBM 32-bit: bit 7 is in byte 0 and equal to 2^25

‐ MIPS 16-bit: bit 7 is in byte 1 and equal to 2^7

- MIPS 32-bit: bit 7 is in byte 3 and is equal to 2^7

- ARM 32-bit BE: bit 7 is in byte 0 and is equal to 2^31

Vs. every single LE system, regardless of word width

- bit N is in byte (N//8) and is equal to 2^N

(And of course none of these match how ethernet orders bits/bytes, but that's a different topic)

New comment by variaga in "String theory inspires a brilliant, baffling new math proof"

variaga — Sat, 13 Dec 2025 03:39:06 +0000

>Do you just mean that we must assume something to get the ball rolling

They're called "axioms"

New comment by variaga in "Anthropic taps IPO lawyers as it races OpenAI to go public"

variaga — Wed, 03 Dec 2025 18:14:36 +0000

On my phone keyboard (android) "×" is a long-press on "w"

New comment by variaga in "A Fast 64-Bit Date Algorithm (30–40% faster by counting dates backwards)"

variaga — Wed, 26 Nov 2025 20:07:49 +0000

That's correct, the Romans had March as the first month of the year, so leap day was the last day of the year and September, October, November and December were the 7th (sept), 8th (oct), ninth (nov) and 10th (dec) months.

New comment by variaga in "Printed circuit board substrates derived from lignocellulose nanofibrils"

variaga — Sun, 02 Nov 2025 22:57:10 +0000

Not one mention of the material's dialectric constant

New comment by variaga in "Does our “need for speed” make our wi-fi suck?"

variaga — Sat, 11 Oct 2025 03:35:32 +0000

You can isolate your ethernet over coax from your neighbor with a MoCA POE "point of entry" filter which blocks the frequencies used by MoCA.

You can buy them online for around $10 and they install without tools,

Besides neighbors, you may also need a POE filter if you have certain types of cable modem.

New comment by variaga in "Where did the Smurfs get their hats (2018)"

variaga — Thu, 11 Sep 2025 14:46:29 +0000

Smurfette isn't an actual Smurf, she's a construct made by Gargamel (yes, this is actual Smurf canon), so presumably her hair is also some sort of construct.

New comment by variaga in "The forgotten meaning of "jerk""

variaga — Tue, 19 Aug 2025 23:41:58 +0000

>> It could never be made today.

> Why not?

M. Emmett Walsh, Carl Reiner, Maurice Evans and Jackie Mason are all dead, for one reason.

New comment by variaga in "SUS Lang: The SUS Hardware Description Language"

variaga — Mon, 07 Jul 2025 23:33:19 +0000

Word. 28 years of FPGA and ASIC design here, in VHDL, Verliog and SystemVerliog. Coming from VHDL, verilog had some painful limitations (no struct/record type) but SV fixed those, and supports some surprisingly powerful metaprogramming.

But even when using plain verilog the language was never the limiting factor on the design process.

New comment by variaga in "Characterizing my first attempt at copper-only passives"

variaga — Thu, 12 Jun 2025 01:38:29 +0000

It gets done inside silicon chips because the (relative) costs of going off the chip and back on again are huge, and the parasitic inductance of the on/off chip path can make a an off-chip capacitor effectively useless.